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Silicon Labs /Series1 /EFM32GG11B /EFM32GG11B420F2048GL120 /SDIO /CFG1

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Interpret as CFG1

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31282724232019161512118743000000000000000000000000000000000000000000 (ASYNCINTRSUP)ASYNCINTRSUP0 (RMSDSLOT)SLOTTYPE0 (CSDR50SUP)CSDR50SUP0 (CSDR104SUP)CSDR104SUP0 (CDDR50SUP)CDDR50SUP0 (CDRVASUP)CDRVASUP0 (CDRVCSUP)CDRVCSUP0 (CDRVDSUP)CDRVDSUP0RETUNTMRCTL0 (TUNSDR50)TUNSDR500RETUNMODES0 (SPISUP)SPISUP0 (ASYNCWKUPEN)ASYNCWKUPEN

SLOTTYPE=RMSDSLOT

Description

Core Configuration 1

Fields

ASYNCINTRSUP

Asynchronous Interrupt Support
SLOTTYPE

Slot Type

0 (RMSDSLOT): Removable SD Card Slot

1 (EMSDSLOT): Embedded SD Card Slot

2 (SHBUSSLOT): Shared SD Card Slot
CSDR50SUP

Core Support SDR50
CSDR104SUP

Support SDR104
CDDR50SUP

Support DDR50
CDRVASUP

Support Type a Driver
CDRVCSUP

Support Type C Driver
CDRVDSUP

Support Type D Driver
RETUNTMRCTL

Retuning Timer Control
TUNSDR50

Tuning for SDR50
RETUNMODES

Retuning Modes
SPISUP

SPI Support
ASYNCWKUPEN

Asynchronous Wakeup Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data